(A) Field of the Invention
The present invention is related to a built-in-self-test (BIST) apparatus and a BIST method, and more particularly to a BIST apparatus and a BIST method for an analog-to-digital converter (ADC).
(B) Description of the Related Art
Given the advancement of integrated circuits with high integration, more and more circuits are being integrated into a system-on-a-chip, SoC. Plenty of digital-to-analog converters (DACs), ADCs and mixed-signal circuits with a combination of analog function and digital function are applied in fields like wireless communications, data conversion system, satellite communications, etc. Recent years see the development of BIST technology intended for the aforesaid circuits, wherein self-tests are directly conducted on hardware by built-in circuits in order to cut cost and shorten test duration.
In the past, when it came to a BIST intended for an ADC, non-linearity problems commonly found in the course of conversion of analog signals into digital signals were solved using a control circuit to generate a random pattern. However, the generation of a random pattern usually entails using a control circuit with relatively more bits so as to achieve high resolution. Hence, the method of generating a random pattern not only limits the widespread application of the BIST apparatus intended for an ADC but also requires higher investment on hardware.